Full bio can be found here. 

Research Interest:

Low Power and Process Variation Tolerant Communication Circuits and Systems design through use of tunable RF/ Analog and Mixed Signal circuits and intelligent algorithms.

 

Education:

Georgia Institute of Technology:  (Atlanta, GA, USA)                                                                       Aug 2006–present

-       PhD in Electrical and Computer Engineering (ECE)             GPA :   3.92/4.0          May 2011 (expected)

-       MS in ECE                                                                                                                                                        May 2009

Jadavpur University: (Kolkata, India)                                                                                                     Aug 2002–June 2006

-       Bachelor of Engineering in Electronics and Tele-Communication Engineering.

§  CGPA                       9.41/10.  (With Honors)

§  Department rank    2^nd

Work Experience:

Georgia Institute of Technology: Graduate Research Assistant                                             Aug 2006–present

-          Adaptation of wireless transceivers under varying channel conditions for low power operation.

-          Self-healing of RF transceivers for reliable operation under severe process variation.

-          Process variation tolerant low power wireless circuits and systems design.

-          Low cost built in testing and tuning of RF transceivers.

RAMBUS Inc. (USA): Communication Circuit Design Research Intern                      May 2009 – Aug 2009

-          Design in 45nm LP CMOS of an A multi-channel wireline transceiver system for high data rate transmission through notchy wired channels.

§  An ON OFF Keying transmitter and receiver at 30 GHz capable of transmitting at 5 Gbps.

§  A 10 Gbps NRZ transmitter and receiver system.

§  An intelligent self mixing circuit for low power decoding of OOK signals.

§  The designed transceiver system could increase data rate by 50% with only 10% extra power overhead under notchy channels.

QUALCOMM Inc. (USA): RFIC Design Co-op                                                                                  Jan 2008 – Aug 2008

-          Design and tape out in 65nm RF CMOS of an Ultra Low-power Wideband Jammer Detector

§  An ultra low power, high gain, wide bandwidth RF Amplifier (current mode).

§  A smart CMOS peak detector (high sensitivity through differential peak detection with gain).

§  An analog comparator and a level shifter.

§  A digital conditioning circuit to provide programmable attack time from few ns to several ms.

§  Digital design includes relaxation oscillator, counters, pulse stretcher, transition detect logic.

§  Operating Frequency range: 100 MHz to 2.4 GHz.

§  Supports multistandard jammer detection. High sensitivity, extremely low area.

§  To be used in a commercial product in conjunction with a DVB-H receiver.

§  Silicon measurements have verified the design specifications.

-          Designed an ultra low phase noise, low power Ring Oscillator VCO in 65nm CMOS.

Indian Institute of Science:                                                                                                                 May 2005 – Jul 2005

-          Electrical Modeling of a torsional RF MEMS varactor.

Awards & Honors:

·     2010-11 Intel Corporation PhD Fellowship. 

·     2008 IEEE MTT-S Graduate Fellowship Award by IEEE Microwave Theory and Techniques Society (only 6 students selected worldwide).· 

·     Margarida Jacome Best Research Award (September 2007) by UC Berkley Gigascale System Research Center (GSRC) for the work titled VIZOR: Virtually Zero Margin RF, in which adaptive RF system and circuits have been designed which adapts itself to the environment  to operate at minimum power level possible. GSRC is one of five research centers funded under the Focus Center Research Program, a Semiconductor Research Corporation program.

·     2^nd Best Paper Award in IEEE Radio and Wireless Symposium 2008 for the work titled “Concurrent PAR and Power Amplifier Adaptation for Power Efficient Operation of WiMAX OFDM Transmitters.”

·   Best Student Paper Candidate in IEEE International Test Conference (ITC) 2009. 

·   Selected for presenting dissertation work at ACM/SIGDA Design Automation Conference (DAC) PhD Forum, 2011. Received travel grant from ACM/SIGDA. 

·   Selected for Second ACM Student Research Competition at the ACM/IEEE Design Automation Conference 2011 (DAC 2011).

·   Semiconductor Research Corporation (SRC) Inventor Recognition Award, April 2009.

·   2009 Georgia Tech Tower Award for Academic Excellence.

·  Invited to INTEL INDIA (Intel India Student Research Contest 2005) for presenting the research work on Wireless transceivers for simultaneously sensing CO and CH₄ in mines, performed in IIT Kharagpur.

·     Ohio State University (OSU) University Fellowship 2006-2007 (1% acceptance rate) and JHU ECE fellowship 2006.

·     Recipient of prestigious Young Engineering Fellowship (YEFP 2005)-an extremely competitive Govt. of India Program, conducted by Indian Institute of Science (IISC), Bangalore.

·     IEEE/ACM Design Automation Conference (DAC) 2008 Travel Assistance Award.

·     Fellowship recipient at IEEE VLSI Design 2006 and PReMI, sponsored by Department of Science and Technology, Government of India.

·     Best Paper Award in IEEE student contest SPCTS 2005 and WEBFAB2K5.

·     Stood 28^th (medical stream) & 43^rd (engineering stream) in the West Bengal Joint Entrance Examination among approximately 170,000 examinees in 2002.

Publication: